A. Field of the Invention
The present invention relates to a power transistor, more particularly, to an insulated gate bipolar transistor (hereinafter referred to as an IGBT), having improved switching characteristic.
B. Description of the Prior Art
Generally, an IGBT is a power semiconductor device for reducing a conduction loss of a conventional power MOSFET (metal-oxide semiconductor field effect transistor) effectively.
Since an IGBT has a MOS gate structure, it is controlled by adjusting voltage applied to the gate, while its output characteristic is similar to that of a bipolar transistor.
FIG. 1 is a cross sectional view of an N channel IGBT.
The N channel IGBT has a combination of a vertical double diffuse MOS (VDMOS) structure and a vertical PNP transistor, which has an N type epitaxial layer on a P type substrate and a double diffuse MOS (DMOS) cell formed thereon.
As shown in the FIG. 1, in a conventional N channel insulated gate bipolar transistor, an N+ type buffer layer 120 is formed on a P+ type semiconductor substrate 110, and an N type epitaxial layer 130 is formed on the buffer layer 120. A P type well 140 is formed in the epitaxial layer 130 and N+ type emitter regions 142 separated for each other are formed in the well 140. The well 140 has both a high density region and a low density region. A gate oxide film 150 is formed on the part of the well 140 and the surface of epitaxial layer 130, and a gate 160 enclosed with a insulating film 170 is formed on the gate oxide film 150. The emitter regions 142 and the well 140 are electrically connected to each other via an emitter electrode 180. A collector electrode 182 is formed on the other surface of the substrate 110.
Generally, the epitaxial layer 130 is thick and has the low density in order to provide a high breakdown voltage feature of the IGBT. When the transistor is turned on, the substrate 110 injects carriers into the epitaxial layer 130.
When a positive voltage over a threshold voltage of the device is applied to the gate 160, an inversion layer is produced near the surface of the P type well 140 under the gate oxide film 150. If the bias between the collector electrode 182 and the emitter electrode 180 is forward, electrons move from the emitter region 142 to the epitaxial layer 130 through the inversion layer.
This electron flow serves as a base current of a PNP bipolar transistor composed of the P+ type substrate 110, the N type epitaxial layer 130 and the P type well 140. At this time, since holes are injected into the epitaxial layer 130 from the substrate 110 through the buffer layer 120, the device is turned on. The holes, excess carriers injected from the substrate 110 into the epitaxial layer 130, cause an electric conductivity of the epitaxial layer 130 to be increased to the high level injection state. When the IGBT is turned on, the holes affect a forward voltage drop to be extremely small.
A part of the excess holes are recombined with electrons entered through the reverse layer in the epitaxial layer 130, and the rest of the excess holes flows into the emitter electrode 180 through the reverse biased junction of the well 140 and the epitaxial layer 130.
On the other hand, the electrons without being recombined with the holes within the epitaxial layer 130 are injected into the substrate 110 to flow into the collector electrode 182.
According to this principle, when the IGBT is turned on, currents due to electrons and due to holes exists simultaneously, and this bipolar output characteristic is superior to that of an unipolar device such as an MOSFET.
On the other hand, in order to turn off the IGBT, the gate 150 is either shorted to the emitter electrode 180 or applied with negative voltage so that the electronic current is limited.
Then, the inversion layer disappears so that electrons cannot move. Therefore, a part of electrons within the epitaxial layer 130 are recombined with holes, and the rest are injected into the substrate 110. After all, the electrons disappears and thus currents is rapidly reduced so much as to the electronic currents.
On the other hand, holes within the epitaxial layer 130 are slowly decreased although they are recombined with electrons, since they are minority carriers. A part of holes flows into the emitter electrode 180 through the well 140 and remains as a tail current component in the case of turning off.
When the IGBT is turned off, the collector current is reduced and the supply voltage bias is applied to both the collector 182 and the emitter 180. Therefore, the voltage applied to the device is rapidly increased.
The increasing voltage applied to the collector 182 and the emitter 180 causes the reverse bias on the junction of the epitaxial layer 130 and the well 140, and a depletion layer produced thereby becomes wider as the bias becomes higher. Accordingly, the excess holes in the epitaxial layer 130 are swept into the emitter electrode 180 by a strong electric field of the depletion layer.
As described above, the switching loss of the IGBT is larger than that of the MOSFET because of a residual current due to the excess holes in switching off. In order to solve this problem, a structure being capable of producing paths for holes when turned off is proposed.
This conventional structure will now be described in detail with reference to the accompanying drawings.
FIG. 2 is the cross sectional view of the conventional semiconductor having a structure having an IGBT unit cell formed in an IGBT section I and an MOS control thyristor (hereinafter referred to as an MCT) unit cell formed in a M section.
As shown FIG. 2, a P+ type substrate 210 has a first surface and a second surface opposite the first surface. An N type epitaxial layer 230 is formed on the first surface of the substrate 210, and a deep P type well 244 and a shallow P type well 240 separated to each other are formed in the epitaxial layer 230 of the MCT section M and the IGBT section I, respectively. A shallow well 240 has a concentration varying from a high density to a low density on going from lower region and to the upper region.
An N+ well 246 is formed in the deep well 244, and P+ diffusion regions 248 separated from each other are formed in the N+ well 246. Emitter regions 242 separated from each other are formed in the shallow well 240. A gate oxide film 250 is formed on the surface of epitaxial layer 230 adjacent to the diffusion region 248 and the N type emitter 242, and the gate 260 covered with the insulating film 270 is formed on the gate oxide film 250. A cathode electrode 280 is formed all over the surface, and an anode electrode 282 is formed on the second surface of the substrate 210.
In this conventional semiconductor device, holes, excess carriers of the epitaxial layer 230, flow into the cathode electrode 280 through the P channel formed in the N+ well 246 of the MCT cell by a negative bias applied to the gate 260 when switching-off.
However, since wells 246 and 240 of different conductive types are formed with the same depth in the MCT section M and the IGBT section I, respectively, an additional masking process is required as well as the IGBT process. Furthermore, since the junction depth of the base region or the deep well 244 of the MCT unit cell should be deeper than the junction depth of the base region or the shallow well 240 of the IGBT unit cell, the epitaxial layer 230 should be thicker than the general epitaxial layer in order to obtain the same breakdown voltage. In this case, there are problems that the resistance under on state increases in turning-off and the switching loss increases due to the increase of the current paths.
In addition, the N channel length of the deep well 244 determined by its junction depth becomes longer than that of the common IGBT. Consequently, the lengthened channel contribute to the increase of the on-resistance. Since the MCT unit cell and the IGBT unit cell are independently arranged, it is difficult to effectively remove the current concentration when switching-off. Accordingly, it is hard to get a large safe operation area (SOA). Moreover, since the high current created by the MCT cell is induced by the latching characteristic of the thyristor, the latching phenomenon is created in the IGBT cell to break the device when switching-off unless the current is dispersed effectively.